1133 search results - page 102 / 227 » Compiling for Speculative Architectures |
153
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EMSOFT
2005
Springer
15 years 9 months ago
2005
Springer
Power leakage constitutes an increasing fraction of the total power consumption in modern semiconductor technologies. Recent research efforts have tried to integrate architecture...
138
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ICS
2004
Tsinghua U.
15 years 9 months ago
2004
Tsinghua U.
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...
128
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APCSAC
2006
IEEE
15 years 10 months ago
2006
IEEE
Abstract. Instruction hints have become an important way to communicate compile-time information to the hardware. They can be generated by the compiler and the post-link optimizer ...
137
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DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper presents a new operation chaining reconfigurable scheduling algorithm (CRS) based on list scheduling that maximizes instruction level parallelism available in distribut...
126
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FCCM
2006
IEEE
15 years 10 months ago
2006
IEEE
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...