1133 search results - page 61 / 227 » Compiling for Speculative Architectures |
ICCAD
2005
IEEE
14 years 5 months ago
2005
IEEE
Abstract — This paper describes a practical technique for the optimal scheduling of control dominated systems minimizing the weighted average latency over all control branches. S...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Testing today of a several hundred million transistor System-on-Chip with analog, RF blocks, many processor cores and tens of memories is a huge task. What will test technology be...
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
—This paper presents a design space exploration of a selective load value prediction scheme suitable for energyaware Simultaneous Multi-Threaded (SMT) architectures. A load value...
ICS
2000
Tsinghua U.
14 years 3 days ago
2000
Tsinghua U.
The rapid advancements of networking technology have boosted potential bandwidth to the point that the cabling is no longer the bottleneck. Rather, the bottlenecks lie at the cros...
IEEEPACT
1998
IEEE
14 years 23 days ago
1998
IEEE
Conventional speculative architectures use branch prediction to evaluate the most likely execution path during program execution. However, certain branches are difficult to predic...