903 search results - page 105 / 181 » Completeness Results for Memory Logics |
JLP
2010
13 years 3 months ago
2010
The work presented here investigates the combination of Kleene algebra with the synchrony model of concurrency from Milner's SCCS calculus. The resulting algebraic structure ...
ITC
2000
IEEE
14 years 1 months ago
2000
IEEE
This paper describes the results of testing 50 single inline memory modules (SIMMs), each containing 16 16Mbit DRAM chips (DUTs); 39 SIMMs failed, and of the 800 DUTs, 116failed. ...
ACSD
2007
IEEE
14 years 27 days ago
2007
IEEE
Synthesis of asynchronous circuits from Signal Transition Graphs (STGs) involves resolution of state encoding conflicts by means of refining the STG specification. In this paper, ...
ARCS
2008
Springer
13 years 11 months ago
2008
Springer
: Sorting large data sets has always been an important application, and hence has been one of the benchmark applications on new parallel architectures. We present a parallel sortin...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
— We examine an abstract formulation of BIST diagnosis in digital logic systems. The BIST diagnosis problem has applications that include identification of erroneous test vector...