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» Complexity Analysis of H.264 Decoder for FPGA Design
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VTC
2010
IEEE
113views Communications» more  VTC 2010»
13 years 6 months ago
Design of Fixed-Point Processing Based Turbo Codes Using Extrinsic Information Transfer Charts
—The operand-width specifications in fixed-point hardware implementations of turbo code decoders is an important design issue, since this governs the trade-off between the deco...
Liang Li, Robert G. Maunder, Bashir M. Al-Hashimi,...
CODES
2008
IEEE
14 years 2 months ago
Symbolic voter placement for dependability-aware system synthesis
This paper presents a system synthesis approach for dependable embedded systems. The proposed approach significantly extends previous work by automatically inserting fault detect...
Felix Reimann, Michael Glabeta, Martin Lukasiewycz...
ICCCN
2007
IEEE
14 years 1 months ago
On Short Forward Error-Correcting Codes for Wireless Communication Systems
—For real-time wireless communications, short forward error-correcting (FEC) codes are indispensable due to the strict delay requirement. In this paper we study the performance o...
Sheng Tong, Dengsheng Lin, Aleksandar Kavcic, Baom...
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
14 years 1 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna
CODES
2004
IEEE
13 years 11 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan