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EMSOFT
2004
Springer
14 years 28 days ago
An approach for integrating basic retiming and software pipelining
Basic retiming is an algorithm originally developed for hardware optimization. Software pipelining is a technique proposed to increase instruction-level parallelism for parallel p...
Noureddine Chabini, Wayne Wolf
EUROPAR
2004
Springer
14 years 27 days ago
Improving Data Cache Performance via Address Correlation: An Upper Bound Study
Address correlation is a technique that links the addresses that reference the same data values. Using a detailed source-code level analysis, a recent study [1] revealed that diffe...
Peng-fei Chuang, Resit Sendag, David J. Lilja
MICRO
2002
IEEE
124views Hardware» more  MICRO 2002»
14 years 13 days ago
Optimizing pipelines for power and performance
During the concept phase and definition of next generation high-end processors, power and performance will need to be weighted appropriately to deliver competitive cost/performan...
Viji Srinivasan, David Brooks, Michael Gschwind, P...
ISCA
1998
IEEE
107views Hardware» more  ISCA 1998»
13 years 11 months ago
Memory Dependence Prediction Using Store Sets
For maximum performance, an out-of-order processor must issue load instructions as early as possible, while avoiding memory-order violations with prior store instructions that wri...
George Z. Chrysos, Joel S. Emer
ISLPED
2007
ACM
84views Hardware» more  ISLPED 2007»
13 years 9 months ago
Towards a software approach to mitigate voltage emergencies
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. One a...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...