Sciweavers

271 search results - page 6 / 55
» Complexity-Effective Superscalar Processors
Sort
View
IEEEPACT
2000
IEEE
13 years 12 months ago
Exploring Sub-Block Value Reuse for Superscalar Processors
The performance potential of a value reuse mechanism depends on its reuse detection time, the number of reuse opportunities, and the amount of work saved by skipping each reuse un...
Jian Huang, David J. Lilja
29
Voted
ASPDAC
2006
ACM
104views Hardware» more  ASPDAC 2006»
13 years 11 months ago
SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar proces
- Technology scaling and sub-wavelength optical lithography is associated with significant process variations. We propose a self-adaptive variable supply-voltage scaling (SAVS) tec...
Hai Li, Yiran Chen, Kaushik Roy, Cheng-Kok Koh
MICRO
2000
IEEE
96views Hardware» more  MICRO 2000»
13 years 12 months ago
Instruction distribution heuristics for quad-cluster, dynamically-scheduled, superscalar processors
We investigate instruction distribution methods for quadcluster, dynamically-scheduled superscalar processors. We study a variety of methods with different cost, performance and c...
Amirali Baniasadi, Andreas Moshovos
CF
2010
ACM
14 years 17 days ago
Interval-based models for run-time DVFS orchestration in superscalar processors
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
Georgios Keramidas, Vasileios Spiliopoulos, Stefan...
ISCA
1999
IEEE
110views Hardware» more  ISCA 1999»
13 years 11 months ago
Decoupling Local Variable Accesses in a Wide-Issue Superscalar Processor
Providing adequate data bandwidth is extremely important for a wide-issue superscalar processor to achieve its full performance potential. Adding a large number of ports to a data...
Sangyeun Cho, Pen-Chung Yew, Gyungho Lee