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MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 1 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
FCCM
2006
IEEE
113views VLSI» more  FCCM 2006»
14 years 1 months ago
GraphStep: A System Architecture for Sparse-Graph Algorithms
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
IEEEPACT
2006
IEEE
14 years 1 months ago
A low-cost memory remapping scheme for address bus protection
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
Lan Gao, Jun Yang 0002, Marek Chrobak, Youtao Zhan...
PLDI
2006
ACM
14 years 1 months ago
Free-Me: a static analysis for automatic individual object reclamation
Garbage collection has proven benefits, including fewer memoryrelated errors and reduced programmer effort. Garbage collection, however, trades space for time. It reclaims memory...
Samuel Z. Guyer, Kathryn S. McKinley, Daniel Framp...
IPPS
2005
IEEE
14 years 1 months ago
Automatic Support for Irregular Computations in a High-Level Language
The problem of writing high performance parallel applications becomes even more challenging when irregular, sparse or adaptive methods are employed. In this paper we introduce com...
Jimmy Su, Katherine A. Yelick