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TVLSI
2010
13 years 3 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
IPPS
1998
IEEE
14 years 25 days ago
Design and Implementation of a Parallel I/O Runtime System for Irregular Applications
In this paper we present the design, implementation and evaluation of a runtime system based on collective I/O techniques for irregular applications. We present two models, namely...
Jaechun No, Sung-Soon Park, Jesús Carretero...
EGPGV
2004
Springer
214views Visualization» more  EGPGV 2004»
14 years 1 months ago
Hierarchical Visualization and Compression of Large Volume Datasets Using GPU Clusters
We describe a system for the texture-based direct volume visualization of large data sets on a PC cluster equipped with GPUs. The data is partitioned into volume bricks in object ...
Magnus Strengert, Marcelo Magallón, Daniel ...
ISVLSI
2008
IEEE
152views VLSI» more  ISVLSI 2008»
14 years 3 months ago
Improving the Test of NoC-Based SoCs with Help of Compression Schemes
Re-using the network in a NoC-based system as a test access mechanism is an attractive solution as pointed out by several authors. As a consequence, testing of NoC-based SoCs is b...
Julien Dalmasso, Érika F. Cota, Marie-Lise ...
EMNLP
2011
12 years 8 months ago
Learning Sentential Paraphrases from Bilingual Parallel Corpora for Text-to-Text Generation
Previous work has shown that high quality phrasal paraphrases can be extracted from bilingual parallel corpora. However, it is not clear whether bitexts are an appropriate resourc...
Juri Ganitkevitch, Chris Callison-Burch, Courtney ...