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» Compressing Functional Tests for Microprocessors
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DATE
2009
IEEE
87views Hardware» more  DATE 2009»
14 years 2 months ago
Efficient compression and handling of current source model library waveforms
—This paper describes a waveform compression technique suitable for the efficient utilization, storage and interchange of the emerging current source model (CSM) based cell libra...
Safar Hatami, Peter Feldmann, Soroush Abbaspour, M...
CISS
2008
IEEE
14 years 1 months ago
1-Bit compressive sensing
Abstract—Compressive sensing is a new signal acquisition technology with the potential to reduce the number of measurements required to acquire signals that are sparse or compres...
Petros Boufounos, Richard G. Baraniuk
BMCBI
2008
117views more  BMCBI 2008»
13 years 7 months ago
RNACompress: Grammar-based compression and informational complexity measurement of RNA secondary structure
Background: With the rapid emergence of RNA databases and newly identified non-coding RNAs, an efficient compression algorithm for RNA sequence and structural information is neede...
Qi Liu, Yu Yang, Chun Chen, Jiajun Bu, Yin Zhang, ...
MTV
2006
IEEE
98views Hardware» more  MTV 2006»
14 years 1 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...
DATE
2004
IEEE
138views Hardware» more  DATE 2004»
13 years 11 months ago
STEPS: Experimenting a New Software-Based Strategy for Testing SoCs Containing P1500-Compliant IP Cores
This paper presents STEPS, an innovative softwarebased approach for testing P1500-compliant SoCs. STEPS is based on the concept that the ATE is not considered as an initiator appl...
Mounir Benabdenbi, Alain Greiner, François ...