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DAC
2008
ACM
14 years 11 months ago
Symbolic noise analysis approach to computational hardware optimization
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
Arash Ahmadi, Mark Zwolinski
SMA
2010
ACM
171views Solid Modeling» more  SMA 2010»
13 years 10 months ago
Efficient simplex computation for fixture layout design
Designing a fixture layout of an object can be reduced to computing the largest simplex and the resulting simplex is classified using the radius of the largest inscribed ball cent...
Yu Zheng, Ming C. Lin, Dinesh Manocha
DAC
2007
ACM
14 years 1 months ago
Memory Modeling in ESL-RTL Equivalence Checking
When designers create RTL models from a system-level specification, arrays in the system-level model are often implemented as memories in the RTL. Knowing the correspondence betwe...
Alfred Kölbl, Jerry R. Burch, Carl Pixley
ISSS
2002
IEEE
130views Hardware» more  ISSS 2002»
14 years 2 months ago
System-Level Modeling of a Network Switch SoC
We present the modeling of the high-level design of a next generation network switch from the perspective of a ComputerAided Design (CAD) team within the larger context of a desig...
Andrew S. Cassidy, Christopher P. Andrews, Donald ...
MOC
2000
137views more  MOC 2000»
13 years 9 months ago
The apolar bilinear form in geometric modeling
Some recent methods of Computer Aided Geometric Design are related to the apolar bilinear form, an inner product on the space of homogeneous multivariate polynomials of a fixed deg...
Gert Vegter