Sciweavers

671 search results - page 31 / 135
» Computer Aided Modelling Exercises
Sort
View
DAC
2003
ACM
14 years 3 months ago
Performance trade-off analysis of analog circuits by normal-boundary intersection
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
Guido Stehr, Helmut E. Graeb, Kurt Antreich
ISSS
2002
IEEE
148views Hardware» more  ISSS 2002»
14 years 2 months ago
A Case Study of Hardware and Software Synthesis in ForSyDe
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
Ingo Sander, Axel Jantsch, Zhonghai Lu
ISSS
2002
IEEE
106views Hardware» more  ISSS 2002»
14 years 2 months ago
Modeling Assembly Instruction Timing in Superscalar Architectures
This paper proposes an original model of the execution time of assembly instructions in superscalar architectures. The approach is based on a rigorous mathematical model and provi...
William Fornaciari, Vito Trianni, Carlo Brandolese...
ACSC
2004
IEEE
14 years 1 months ago
Learning Models for English Speech Recognition
This paper reports on an experiment to determine the optimal parameters for a speech recogniser that is part of a computer aided instruction system for assisting learners of Engli...
Huayang Xie, Peter Andreae, Mengjie Zhang, Paul Wa...
ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
13 years 7 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen