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» Computer aided creativity and multicriteria optimization in ...
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DAC
2010
ACM
13 years 11 months ago
Eyecharts: constructive benchmarking of gate sizing heuristics
—Discrete gate sizing is one of the most commonly used, flexible, and powerful techniques for digital circuit optimization. The underlying problem has been proven to be NP-hard ...
Puneet Gupta, Andrew B. Kahng, Amarnath Kasibhatla...
VLSID
2009
IEEE
142views VLSI» more  VLSID 2009»
14 years 8 months ago
Floorplanning for Partial Reconfiguration in FPGAs
Partial Reconfiguration on heterogeneous Field Programmable Gate Arrays (FPGA) with millions of gates yields better utilization of resources by swapping in and out the active modu...
Pritha Banerjee, Megha Sangtani, Susmita Sur-Kolay
CEC
2009
IEEE
14 years 11 days ago
Glomerulus extraction by using genetic algorithm for edge patching
—Glomerulus is the filtering unit of the kidney. In the computer aided diagnosis system designed for kidney disease, glomerulus extraction is an important step for analyzing kidn...
Jiaxin Ma, Jingqiao Zhang, Jinglu Hu
ISPD
2006
ACM
175views Hardware» more  ISPD 2006»
14 years 1 months ago
mPL6: enhanced multilevel mixed-size placement
The multilevel placement package mPL6 combines improved implementations of the global placer mPL5 (ISPD05) and the XDP legalizer and detailed placer (ASPDAC06). It consistently pr...
Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kent...
SLIP
2005
ACM
14 years 1 months ago
Congestion prediction in early stages
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...
Chiu-Wing Sham, Evangeline F. Y. Young