Sciweavers

    15485 search results - page 2984 / 3097
    » Computing Optimal Subsets
    Sort
    View
    DAC
    2007
    ACM
    131views Computer Architecture» more  DAC 2007»
    Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
    14 years 10 months ago
    Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
    Download  cobweb.ecn.purdue.edu
    This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
    Kunhyuk Kang, Kee-Jong Kim, Kaushik Roy
    claim paper
    Read More »
    DAC
    2000
    ACM
    102views Computer Architecture» more  DAC 2000»
    Multiple Si layer ICs: motivation, performance analysis, and design implications
    14 years 10 months ago
    Multiple Si layer ICs: motivation, performance analysis, and design implications
    Download  www-ee.stanford.edu
    Continuous scaling of VLSI circuits is reducing gate delays but rapidly increasing interconnect delays. Semiconductor Industry Association (SIA) roadmap predicts that, beyond the ...
    Shukri J. Souri, Kaustav Banerjee, Amit Mehrotra, ...
    claim paper
    Read More »
    DAC
    2002
    ACM
    151views Computer Architecture» more  DAC 2002»
    Design of a high-throughput low-power IS95 Viterbi decoder
    14 years 10 months ago
    Design of a high-throughput low-power IS95 Viterbi decoder
    Download  www.cesr.ncsu.edu
    The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
    Xun Liu, Marios C. Papaefthymiou
    claim paper
    Read More »
    DAC
    2003
    ACM
    161views Computer Architecture» more  DAC 2003»
    On-chip logic minimization
    14 years 10 months ago
    On-chip logic minimization
    Download  www.cs.ucr.edu
    While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such a...
    Roman L. Lysecky, Frank Vahid
    claim paper
    Read More »
    DAC
    2004
    ACM
    121views Computer Architecture» more  DAC 2004»
    Memory access scheduling and binding considering energy minimization in multi-bank memory systems
    14 years 10 months ago
    Memory access scheduling and binding considering energy minimization in multi-bank memory systems
    Download  www.cs.ucr.edu
    Memory-related activity is one of the major sources of energy consumption in embedded systems. Many types of memories used in embedded systems allow multiple operating modes (e.g....
    Chun-Gi Lyuh, Taewhan Kim
    claim paper
    Read More »
    « Prev « First page 2984 / 3097 Last » Next »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.