112 search results - page 2 / 23 » Concurrent Error Detection in S-boxes |
ISCAS
2008
IEEE
14 years 1 months ago
2008
IEEE
— ICEBERG is a block cipher that has been recently proposed for security applications requiring efficient FPGA implementations. In this paper, we investigate a compact ASIC imple...
DFT
2003
IEEE
14 years 23 days ago
2003
IEEE
We discuss the use of convolutional codes to perform concurrent error detection (CED) in finite state machines (FSMs). We examine a previously proposed methodology, we identify i...
DFT
2002
IEEE
14 years 13 days ago
2002
IEEE
Concurrent error detection (CED) methods are typically employed to provide an indication of the operational health of synchronous circuits during normal functionality. Existing CE...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper describes a scalable, technology-independent algorithm for the synthesis of approximate logic circuits. A low overhead, non-intrusive solution for concurrent error dete...
DFT
2008
IEEE
13 years 9 months ago
2008
IEEE
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...