2864 search results - page 434 / 573 » Constraint Programming in OPL |
LCTRTS
2001
Springer
14 years 1 months ago
2001
Springer
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
ECRTS
2000
IEEE
14 years 1 months ago
2000
IEEE
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
HICSS
2000
IEEE
14 years 1 months ago
2000
IEEE
With the recent trend towards deregulating power systems around the world, transfer capability computation emerges as the key issue to a smoothly running power market with multipl...
DATE
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper investigates retiming and clock skew scheduling for improving the tolerance of synchronous circuits to delay variations. It is shown that when both long and short paths...
ISPD
1999
ACM
14 years 1 months ago
1999
ACM
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...