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» Controlled-Load Limited Switch Dynamic Logic Circuit
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CHES
2006
Springer
88views Cryptology» more  CHES 2006»
13 years 11 months ago
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage
Recent research has shown that cryptographers with glitches are vulnerable in front of Side Channel Attacks (SCA). Since then, several methods, such as Wave Dynamic Differential Lo...
Zhimin Chen, Yujie Zhou
INFOCOM
2000
IEEE
13 years 12 months ago
Quantifying the Benefit of Configurability in Circuit-Switched WDM Ring Networks
—In a reconfigurable network, lightpath connections can be dynamically changed to reflect changes in traffic conditions. This paper characterizes the gain in traffic capacity tha...
Brett Schein, Eytan Modiano
ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
13 years 12 months ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
13 years 12 months ago
FSM decomposition by direct circuit manipulation applied to low power design
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
José C. Monteiro, Arlindo L. Oliveira
GLVLSI
2006
IEEE
145views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Leakage current starved domino logic
A new circuit technique based on a single PMOS sleep transistor and a dual threshold voltage CMOS technology is proposed in this paper for simultaneously reducing subthreshold and...
Zhiyu Liu, Volkan Kursun