58 search results - page 5 / 12 » Controlled-Load Limited Switch Dynamic Logic Circuit |
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
—Dynamic programmable logic arrays (PLAs) which are built of the NOR–NOR structure, have been very popular in high performance design because of their high-speed and predictabl...
FPGA
2007
ACM
14 years 1 months ago
2007
ACM
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
—Increasing power density causes die overheating due to limited cooling capacity of the package. Conventional thermal management techniques e.g. logic shutdown, clock gating, fre...