Sciweavers

101 search results - page 15 / 21
» Controller Synthesis for MTL Specifications
Sort
View
ASPDAC
1995
ACM
103views Hardware» more  ASPDAC 1995»
13 years 11 months ago
A scheduling algorithm for multiport memory minimization in datapath synthesis
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
Hae-Dong Lee, Sun-Young Hwang
LREC
2008
106views Education» more  LREC 2008»
13 years 9 months ago
Methodologies for Designing and Recording Speech Databases for Corpus Based Synthesis
In this paper we share our experience and describe the methodologies that we have used in designing and recording large speech databases for applications requiring speech synthesi...
Luís C. Oliveira, Sérgio Paulo, Lu&i...
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
13 years 11 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
DAC
2005
ACM
14 years 8 months ago
Temperature-aware resource allocation and binding in high-level synthesis
Physical phenomena such as temperature have an increasingly important role in performance and reliability of modern process technologies. This trend will only strengthen with futu...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
ECCV
2010
Springer
13 years 11 months ago
Lighting and Pose Robust Face Sketch Synthesis
Automatic face sketch synthesis has important applications in law enforcement and digital entertainment. Although great progress has been made in recent years, previous methods onl...