56 search results - page 7 / 12 » Controller Synthesis from LSC Requirements |
ICRA
2007
IEEE
14 years 2 months ago
2007
IEEE
— Synthesis of robot behaviors towards nontrivial goals often requires reasoning about both discrete and continuous aspects of the underlying domain. Existing approaches in build...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
GLVLSI
2010
IEEE
14 years 1 months ago
2010
IEEE
Researchers are looking for alternatives to overcome the upcoming limits of conventional hardware technologies. Reversible logic thereby established itself as a promising directio...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
ICCAD
2007
IEEE
14 years 2 months ago
2007
IEEE
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...