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LCTRTS
2010
Springer
13 years 6 months ago
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin,...
FPGA
2007
ACM
119views FPGA» more  FPGA 2007»
14 years 2 months ago
Synthesis of an application-specific soft multiprocessor system
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
Jason Cong, Guoling Han, Wei Jiang
MICRO
2007
IEEE
128views Hardware» more  MICRO 2007»
14 years 2 months ago
A Framework for Providing Quality of Service in Chip Multi-Processors
The trends in enterprise IT toward service-oriented computing, server consolidation, and virtual computing point to a future in which workloads are becoming increasingly diverse i...
Fei Guo, Yan Solihin, Li Zhao, Ravishankar Iyer
SAMOS
2007
Springer
14 years 2 months ago
Evaluating Large System-on-Chip on Multi-FPGA Platform
This paper presents a configurable base architecture tailorable for different applications. It allows simple and rapid way to evaluate and prototype large Multi-Processor System-on...
Ari Kulmala, Erno Salminen, Timo D. Hämä...
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
14 years 1 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...