275 search results - page 46 / 55 » Core architecture optimization for heterogeneous chip multip... |
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
Chip multiprocessors (CMPs) substantially increase capacity pressure on the on-chip memory hierarchy while requiring fast access. Neither private nor shared caches can provide bot...
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
CODES
2010
IEEE
13 years 6 months ago
2010
IEEE
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
GECCO
2004
Springer
14 years 2 months ago
2004
Springer
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
CODES
2001
IEEE
14 years 7 days ago
2001
IEEE
The implementation of embedded networked appliances requires a mix of processor cores and HW accelerators on a single chip. When designing such complex and heterogeneous SoCs, the...