548 search results - page 24 / 110 » Core-Selectability in Chip Multiprocessors |
142
Voted
SIGARCH
2008
15 years 3 months ago
2008
This paper presents a parallelization framework for emerging applications on the future chip multiprocessors (CMPs). With the continuing prevalence of CMP and the number of on-die...
122
click to vote
HOTI
2008
IEEE
15 years 10 months ago
2008
IEEE
The Network-on-Chip (NoC) paradigm has emerged as a promising solution for providing connectivity among the increasing number of cores that get integrated into both systems-onchip...
112
click to vote
MICRO
2007
IEEE
15 years 10 months ago
2007
IEEE
DRAM memory is a major resource shared among cores in a chip multiprocessor (CMP) system. Memory requests from different threads can interfere with each other. Existing memory acc...
180
Voted
ISCA
2005
IEEE
15 years 9 months ago
2005
IEEE
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...
142
Voted
DAC
2008
ACM
15 years 5 months ago
2008
ACM
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...