548 search results - page 27 / 110 » Core-Selectability in Chip Multiprocessors |
140
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CF
2009
ACM
15 years 10 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
135
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IEEEPACT
2008
IEEE
15 years 10 months ago
2008
IEEE
Both commercial and scientific workloads benefit from concurrency and exhibit data sharing across threads/processes. The resulting sharing patterns are often fine-grain, with t...
127
Voted
IEEEPACT
2008
IEEE
15 years 10 months ago
2008
IEEE
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
131
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ISCA
2008
IEEE
15 years 10 months ago
2008
IEEE
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
142
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MICRO
2008
IEEE
15 years 10 months ago
2008
IEEE
—Efficient sharing of system resources is critical to obtaining high utilization and enforcing system-level performance objectives on chip multiprocessors (CMPs). Although sever...