Sciweavers

237 search results - page 28 / 48
» Cost-Efficient Memory Architecture Design of NAND Flash Memo...
Sort
View
ISCAS
2002
IEEE
118views Hardware» more  ISCAS 2002»
14 years 19 days ago
A power-configurable bus for embedded systems
Pre-designed configurable platforms, possessing microprocessors, memories, and numerous peripherals on a single chip, are increasing in popularity in embedded system design. Platf...
Chuanjun Zhang, Frank Vahid
DATE
2006
IEEE
71views Hardware» more  DATE 2006»
14 years 1 months ago
Exploring "temperature-aware" design in low-power MPSoCs
The power density inside high performance systems continues to rise with every process technology generation, thereby increasing the operating temperature and creating “hot spot...
Giacomo Paci, Paul Marchal, Francesco Poletti, Luc...
IJES
2007
92views more  IJES 2007»
13 years 7 months ago
Exploring temperature-aware design in low-power MPSoCs
: The power density in high performance systems continues to rise with every process technology generation, thereby increasing the operating temperature and creating ‘hot spots...
Giacomo Paci, Francesco Poletti, Luca Benini, Paul...
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
14 years 2 months ago
Very wide register: an asymmetric register file organization for low power embedded processors
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
CODES
2001
IEEE
13 years 11 months ago
Compiler-directed selection of dynamic memory layouts
Compiler technology is becoming a key component in the design of embedded systems, mostly due to increasing participation of software in the design process. Meeting system-level ob...
Mahmut T. Kandemir, Ismail Kadayif