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DATE
2002
IEEE
84views Hardware» more  DATE 2002»
14 years 17 days ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
ICMCS
2006
IEEE
113views Multimedia» more  ICMCS 2006»
14 years 1 months ago
On Parallelization of a Video Mining System
As digital video data becomes more pervasive, mining information from multimedia data becomes increasingly important. Although researches in multimedia mining area have shown grea...
Wenlong Li, Eric Li, Nan Di, Carole Dulong, Tao Wa...
ISSS
2002
IEEE
174views Hardware» more  ISSS 2002»
14 years 16 days ago
A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor
Nowadays, new DSP applications are offering combined and flexible multimedia and telecom services. VLIW processor architectures, which include dedicated but inflexible functional ...
Carles Rodoreda Sala, Natalino G. Busá
FPL
2010
Springer
174views Hardware» more  FPL 2010»
13 years 5 months ago
ERCBench: An Open-Source Benchmark Suite for Embedded and Reconfigurable Computing
Researchers in embedded and reconfigurable computing are often hindered by a lack of suitable benchmarks with which to accurately evaluate their work. Without a suitable benchmark ...
Daniel W. Chang, Christipher D. Jenkins, Philip C....
ICCD
2002
IEEE
128views Hardware» more  ICCD 2002»
14 years 4 months ago
Subword Sorting with Versatile Permutation Instructions
Subword parallelism has succeeded in accelerating many multimedia applications. Subword permutation instructions have been proposed to efficiently rearrange subwords in or among r...
Zhijie Shi, Ruby B. Lee