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» Criteria for the evaluation of implemented architectures
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SBCCI
2003
ACM
135views VLSI» more  SBCCI 2003»
14 years 4 months ago
Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
Mauricio Ayala-Rincón, Rodrigo B. Nogueira,...
ISCA
2003
IEEE
212views Hardware» more  ISCA 2003»
14 years 4 months ago
A Performance Analysis of PIM, Stream Processing, and Tiled Processing on Memory-Intensive Signal Processing Kernels
Trends in microprocessors of increasing die size and clock speed and decreasing feature sizes have fueled rapidly increasing performance. However, the limited improvements in DRAM...
Jinwoo Suh, Eun-Gyu Kim, Stephen P. Crago, Lakshmi...
ISPASS
2009
IEEE
14 years 5 months ago
Evaluating GPUs for network packet signature matching
Modern network devices employ deep packet inspection to enable sophisticated services such as intrusion detection, traffic shaping, and load balancing. At the heart of such servi...
Randy Smith, Neelam Goyal, Justin Ormont, Karthike...
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
14 years 5 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...
ISLPED
1997
ACM
106views Hardware» more  ISLPED 1997»
14 years 2 months ago
Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for addition
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...