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IPPS
2009
IEEE
14 years 2 months ago
Exploring the multiple-GPU design space
Graphics Processing Units (GPUs) have been growing in popularity due to their impressive processing capabilities, and with general purpose programming languages such as NVIDIA’s...
Dana Schaa, David R. Kaeli
ICPPW
2005
IEEE
14 years 1 months ago
A Practical Approach to the Rating of Barrier Algorithms Using the LogP Model and Open MPI
Large–scale parallel applications performing global synchronization may spend a significant amount of execution time waiting for the completion of a barrier operation. Conseque...
Torsten Hoefler, Lavinio Cerquetti, Torsten Mehlan...
IEEEPACT
2008
IEEE
14 years 1 months ago
Characterizing and modeling the behavior of context switch misses
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
Fang Liu, Fei Guo, Yan Solihin, Seongbeom Kim, Abd...
IEEEPACT
2009
IEEE
14 years 2 months ago
Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors
Translation Lookaside Buffers (TLBs) are a staple in modern computer systems and have a significant impact on overall system performance. Numerous prior studies have addressed TL...
Abhishek Bhattacharjee, Margaret Martonosi
ICCAD
2007
IEEE
113views Hardware» more  ICCAD 2007»
14 years 1 months ago
The FAST methodology for high-speed SoC/computer simulation
— This paper describes the FAST methodology that enables a single FPGA to accelerate the performance of cycle-accurate computer system simulators modeling modern, realistic SoCs,...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...