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» DFFT : Design For Functional Testability
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ITC
2003
IEEE
161views Hardware» more  ITC 2003»
14 years 29 days ago
DFFT : Design For Functional Testability
Creating functional tests that work on an ATE has always been a significant challenge [1]. This paper identifies the fundamental mechanisms for functional test failures of an SOC ...
Haluk Konuk, Leon Xiao
ISQED
2007
IEEE
236views Hardware» more  ISQED 2007»
14 years 2 months ago
3DFFT: Thermal Analysis of Non-Homogeneous IC Using 3D FFT Green Function Method
Due to the roaring power dissipation and gaining popularity of 3D integration, thermal dissipation has been a critical concern of modern VLSI design. The availability for chip-lev...
Dongkeun Oh, Charlie Chung-Ping Chen, Yu Hen Hu
EURODAC
1994
IEEE
145views VHDL» more  EURODAC 1994»
13 years 11 months ago
Testability analysis and improvement from VHDL behavioral specifications
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
CORR
2010
Springer
164views Education» more  CORR 2010»
13 years 6 months ago
Is submodularity testable?
: We initiate the study of property testing of submodularity on the boolean hypercube. Submodular functions come up in a variety of applications in combinatorial optimization. For ...
C. Seshadhri, Jan Vondrák
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 20 days ago
FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis
This paper develops an improved approach for hierarchical functional test generation for complex chips. In order to deal with the increasing complexity of functional test generati...
Vivekananda M. Vedula, Jacob A. Abraham