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» DRAMSim2: A Cycle Accurate Memory System Simulator
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DATE
2009
IEEE
126views Hardware» more  DATE 2009»
14 years 2 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...
CODES
2004
IEEE
13 years 11 months ago
Analytical models for leakage power estimation of memory array structures
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
CASES
2006
ACM
13 years 11 months ago
An accurate and efficient simulation-based analysis for worst case interruption delay
This paper proposes an efficient method to analyze worst case interruption delay (WCID) of a workload running on modern microprocessors using a cycle accurate simulator (CAS). Our...
Hiroshi Nakashima, Masahiro Konishi, Takashi Nakad...
DATE
2004
IEEE
120views Hardware» more  DATE 2004»
13 years 11 months ago
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems
This paper evaluates the use of pin and cycle accurate SystemC models for embedded system design exploration and early software development. The target system is MicroBlaze Vanill...
Tero Rissa, Adam Donlin, Wayne Luk
CODES
2005
IEEE
14 years 1 months ago
Dynamic phase analysis for cycle-close trace generation
For embedded system development, several companies provide cross-platform development tools to aid in debugging, prototyping and optimization of programs. These are full system em...
Cristiano Pereira, Jeremy Lau, Brad Calder, Rajesh...