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CODES
2007
IEEE
14 years 3 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens
ISCAS
2007
IEEE
180views Hardware» more  ISCAS 2007»
14 years 3 months ago
Characterization of a Fault-tolerant NoC Router
— With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip (SoC) and multicore ...
Sumit D. Mediratta, Jeffrey T. Draper
ECTEL
2007
Springer
14 years 2 months ago
The Everlasting Dawn of Educational Brokers - A Search for Key Design Principles
In the last couple of years we have evidenced several initiatives promoting the vision of open educational systems. Educational brokers are supposed to take advantage of this ‘in...
Bernd Simon, Petra Oberhumer, Robert Kristöfl
ACSAC
2006
IEEE
14 years 2 months ago
Back to the Future: A Framework for Automatic Malware Removal and System Repair
Malware is software with malicious intent. Besides viruses and worms, spyware, adware, and other newer forms of malware have recently emerged as widely-spread threats to system se...
Francis Hsu, Hao Chen, Thomas Ristenpart, Jason Li...
DFT
2006
IEEE
105views VLSI» more  DFT 2006»
14 years 2 months ago
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinge...