71 search results - page 13 / 15 » Data Memory Design Considering Effective Bitwidth for Low-En... |
ASAP
2008
IEEE
13 years 9 months ago
2008
IEEE
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
RTAS
2006
IEEE
14 years 1 months ago
2006
IEEE
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
VTS
2005
IEEE
14 years 1 months ago
2005
IEEE
Testing data retention faults (DRFs), particularly in integrated systems on chip comprised of very large number of various sizes and types of embedded SRAMs is challenging and typ...
IOLTS
2005
IEEE
14 years 1 months ago
2005
IEEE
As device geometries continue to shrink, single event upsets are becoming of concern to a wider spectrum of system designers. These “soft errors” can be a nuisance or catastro...
LCTRTS
2005
Springer
14 years 1 months ago
2005
Springer
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...