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MICRO
2003
IEEE
100views Hardware» more  MICRO 2003»
14 years 24 days ago
The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System
Traditional software controlled data cache prefetching is often ineffective due to the lack of runtime cache miss and miss address information. To overcome this limitation, we imp...
Jiwei Lu, Howard Chen, Rao Fu, Wei-Chung Hsu, Bobb...
ICS
2007
Tsinghua U.
14 years 1 months ago
Performance driven data cache prefetching in a dynamic software optimization system
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...
Jean Christophe Beyler, Philippe Clauss
ISCA
1999
IEEE
90views Hardware» more  ISCA 1999»
13 years 11 months ago
Effective Jump-Pointer Prefetching for Linked Data Structures
Current techniques for prefetching linked data structures (LDS) exploit the work available in one loop iteration or recursive call to overlap pointer chasing latency. Jumppointers...
Amir Roth, Gurindar S. Sohi
PARA
2004
Springer
14 years 26 days ago
Cache Optimizations for Iterative Numerical Codes Aware of Hardware Prefetching
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
Josef Weidendorfer, Carsten Trinitis
DATE
2009
IEEE
137views Hardware» more  DATE 2009»
14 years 2 months ago
Adaptive prefetching for shared cache based chip multiprocessors
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
Mahmut T. Kandemir, Yuanrui Zhang, Ozcan Ozturk