244 search results - page 16 / 49 » Data partitioning on chip multiprocessors |
IEEEPACT
2009
IEEE
13 years 6 months ago
2009
IEEE
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
ICCAD
2008
IEEE
14 years 5 months ago
2008
IEEE
In this paper, we propose a new architecture-level parameterized transient thermal behavioral modeling algorithm for emerging thermal related design and optimization problems for ...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
As MultiProcessor System-on-a-Chip (MPSoC) designs become more common, hardware/software codesign engineers face new challenges involving operating system integration. To speed up...
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Driven by continuing scaling of Moore's law, chip multiprocessors and systems-on-a-chip are expected to grow the core count from dozens today to hundreds in the near future. ...
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...