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DATE
2005
IEEE
118views Hardware» more  DATE 2005»
15 years 9 months ago
Energy- and Performance-Driven NoC Communication Architecture Synthesis Using a Decomposition Approach
In this paper, we present a methodology for customized communication architecture synthesis that matches the communication requirements of the target application. This is an impor...
Ümit Y. Ogras, Radu Marculescu
ASPDAC
2004
ACM
75views Hardware» more  ASPDAC 2004»
15 years 9 months ago
A thread partitioning algorithm in low power high-level synthesis
This paper proposes a thread partitioning algorithm in low power high-level synthesis. The algorithm is applied to high-level synthesis systems. In the systems, we can describe pa...
Jumpei Uchida, Nozomu Togawa, Masao Yanagisawa, Ta...
CGI
2004
IEEE
15 years 7 months ago
Combining Sampling and Autoregression for Motion Synthesis
We present a novel approach to motion synthesis. It is shown that by splitting sequences into segments new sequences can be created with a similar look and feel to the original. C...
David Oziem, Neill W. Campbell, Colin J. Dalton, D...
ICIP
2010
IEEE
15 years 1 months ago
Compressed sensing for aperture synthesis imaging
The theory of compressed sensing has a natural application in interferometric aperture synthesis. As in many real-world applications, however, the assumption of random sampling, w...
Stephan Wenger, Soheil Darabi, Pradeep Sen, Karl-H...
124
Voted
VLSID
2004
IEEE
135views VLSI» more  VLSID 2004»
16 years 4 months ago
Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
M. S. Gaur, Mark Zwolinski