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» Datapath Scheduling using Dynamic Frequency Clocking
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RTSS
2002
IEEE
14 years 2 months ago
Dynamic Scan Scheduling
We present an approach to computing cyclic schedules online and in real time, while attempting to maximize a quality-of-service metric. The motivation is the detection of RF emitt...
Bruno Dutertre
IPPS
2007
IEEE
14 years 4 months ago
Determining the Minimum Energy Consumption using Dynamic Voltage and Frequency Scaling
While improving raw performance is of primary interest to most users of high-performance computers, energy consumption also is a critical concern. Some microprocessors allow volta...
Min Yeol Lim, Vincent W. Freeh
GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
14 years 3 months ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
ISLPED
2004
ACM
151views Hardware» more  ISLPED 2004»
14 years 3 months ago
Dynamic voltage and frequency scaling based on workload decomposition
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
ISCA
2005
IEEE
166views Hardware» more  ISCA 2005»
14 years 3 months ago
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
Emil Talpes, Diana Marculescu