69 search results - page 5 / 14 » Datapath Synthesis for Standard-Cell Design |
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...
ASPDAC
2000
ACM
14 years 29 days ago
2000
ACM
Two compact yet high performance standard cell libraries (CyHP libraries), which contain only 11111111 and 20 cells respectively, are proposed. The first CyHP library leads to 5% i...
FCCM
2002
IEEE
14 years 1 months ago
2002
IEEE
C-slow retiming (changing a design to support multiple instances of a computation) and datapath-aware placement have long been advocated by members of the FPGA synthesis community...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
We present a domain-specific approach to representing datapaths for hardware implementations of linear signal transform algorithms. We extend the tensor structure for describing l...
VLSISP
2008
13 years 8 months ago
2008
The speedups and the energy reductions achieved in a generic single-chip microprocessor system by employing a high-performance data-path are presented. The data-path acts as a copr...