As Moore’s Law continues to fuel the ability to build ever increasingly complex system-on-chips (SoCs), achieving performance goals is rising as a critical challenge to completi...
Wolf-Dietrich Weber, Joe Chou, Ian Swarbrick, Drew...
Context-aware applications pose new challenges, including a need for new computational models, uncertainty management, and efficient optimization under uncertainty. Uncertainty c...
Jennifer L. Wong, Weiping Liao, Fei Li, Lei He, Mi...
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...
Marco Caldari, Massimo Conti, Massimo Coppola, Ste...
We propose a new metric for evaluation of interconnect architectures. This metric is computed by optimal assignment of wires from a given wire length distribution (WLD) to a given...
Parthasarathi Dasgupta, Andrew B. Kahng, Swamy Mud...
One of the difficult problems which core-based systemon-chip (SoC) designs face is test access. For testing the cores in a SoC, a special mechanism is required, since they are no...