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DOLAP
2005
ACM
15 years 5 months ago
Mapping conceptual to logical models for ETL processes
Extraction-Transformation-Loading (ETL) tools are pieces of software responsible for the extraction of data from several sources, their cleansing, customization and insertion into...
Alkis Simitsis
DAC
2008
ACM
16 years 4 months ago
Bounded-lifetime integrated circuits
Integrated circuits with bounded lifetimes can have many business advantages. We give some simple examples of m ods to enforce tunable expiration dates for chips using nanom reliab...
Puneet Gupta, Andrew B. Kahng
117
Voted
DATE
2009
IEEE
112views Hardware» more  DATE 2009»
15 years 10 months ago
Test exploration and validation using transaction level models
—The complexity of the test infrastructure and test strategies in systems-on-chip approaches the complexity of the functional design space. This paper presents test design space ...
Michael A. Kochte, Christian G. Zoellin, Michael E...
DATE
1999
IEEE
81views Hardware» more  DATE 1999»
15 years 7 months ago
A Power Estimation Model for High-Speed CMOS A/D Converters
Power estimation is important for system-level exploration and trade-off analysis of VLSI systems. A power estimator for high-speed analog to digital converters that exploits info...
Erik Lauwers, Georges G. E. Gielen
DATE
1997
IEEE
115views Hardware» more  DATE 1997»
15 years 7 months ago
Analogue layout generation by World Wide Web server-based agents
A World Wide Web (WWW) based client/server system has been developed which allows server-side process independent layout generators to generate the design rule correct geometry of...
Les T. Walczowski, D. Nalbantis, W. A. J. Waller, ...