457 search results - page 79 / 92 » Decay-Usage Scheduling in Multiprocessors |
ISSAC
2007
Springer
14 years 1 months ago
2007
Springer
We report on a high-level categorical parallel framework, written in the Aldor language, to support high-performance computer algebra on symmetric multi-processors and multicore p...
RTAS
2005
IEEE
14 years 1 months ago
2005
IEEE
During real-world design of embedded real-time systems, it cannot be expected that all performance data required for scheduling analysis is fully available up front. In such situa...
SPAA
2003
ACM
14 years 22 days ago
2003
ACM
The general problem of verifying coherence for shared-memory multiprocessor executions is NP-Complete. Verifying memory consistency models is therefore NP-Hard, because memory con...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
ICCD
2007
IEEE
13 years 11 months ago
2007
IEEE
While Speculative Multithreading (SM) on a Chip Multiprocessor (CMP) has the ability to speed-up hard-toparallelize applications, the power inefficiency of aggressive speculation ...