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» Decoupled Interconnection of Distributed Memory Models
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CASES
2004
ACM
14 years 9 days ago
Translating affine nested-loop programs to process networks
New heterogeneous multiprocessor platforms are emerging that are typically composed of loosely coupled components that exchange data using programmable interconnections. The compon...
Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
14 years 1 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
ASPLOS
2006
ACM
14 years 8 days ago
Integrated network interfaces for high-bandwidth TCP/IP
This paper proposes new network interface controller (NIC) designs that take advantage of integration with the host CPU to provide increased flexibility for operating system kerne...
Nathan L. Binkert, Ali G. Saidi, Steven K. Reinhar...
IPPS
2008
IEEE
14 years 3 months ago
Modeling and predicting application performance on parallel computers using HPC challenge benchmarks
A method is presented for modeling application performance on parallel computers in terms of the performance of microkernels from the HPC Challenge benchmarks. Specifically, the a...
Wayne Pfeiffer, Nicholas J. Wright
ISPASS
2009
IEEE
14 years 3 months ago
Analyzing CUDA workloads using a detailed GPU simulator
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...
Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, He...