81 search results - page 4 / 17 » Decoupled zero-compressed memory |
GLVLSI
2003
IEEE
14 years 27 days ago
2003
IEEE
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
VLDB
2004
ACM
14 years 28 days ago
2004
ACM
As database application performance depends on the utilization of the memory hierarchy, smart data placement plays a central role in increasing locality and in improving memory ut...
ISCA
2008
IEEE
14 years 2 months ago
2008
IEEE
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE