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» Delay modelling improvement for low voltage applications
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NOCS
2010
IEEE
13 years 5 months ago
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
Tushar N. K. Jain, Paul V. Gratz, Alexander Sprint...
TC
2008
13 years 7 months ago
An Energy-Delay Tunable Task Allocation Strategy for Collaborative Applications in Networked Embedded Systems
Collaborative applications with energy and low-delay constraints are emerging in various networked embedded systems like wireless sensor networks and multimedia terminals. Conventi...
Tao Xie 0004, Xiao Qin
IWANN
2005
Springer
14 years 1 months ago
Ultra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures
Abstract. In this paper we analyse a serial (ripple carry) and a parallel (Kogge-Stone) adder when operating in subthreshold at 100nm and 70nm. These are targeted for ultra low pow...
Valeriu Beiu, Asbjørn Djupdal, Snorre Aunet
INFOCOM
2007
IEEE
14 years 2 months ago
Low-Power Distributed Event Detection in Wireless Sensor Networks
Abstract—In this paper we address the problem of energyefficient event detection in wireless sensor networks (WSNs). Duty cycling is a fundamental approach to conserving energy i...
Yanmin Zhu, Yunhao Liu, Lionel M. Ni, Z. Zhang
IEEEPACT
2008
IEEE
14 years 2 months ago
Meeting points: using thread criticality to adapt multicore hardware to parallel regions
We present a novel mechanism, called meeting point thread characterization, to dynamically detect critical threads in a parallel region. We define the critical thread the one with...
Qiong Cai, José González, Ryan Rakvi...