Abstract. Hardware realization of kernel loops holds the promise of accelerating the overall application performance and is therefore an important part of the synthesis process. In...
The solution of large-scale, nonlinear PDE-based simulations typically depends on the performance of sparse linear solvers, which may be invoked at each nonlinear iteration. We pre...
Sanjukta Bhowmick, Lois C. McInnes, Boyana Norris,...
This paper proposes a method for predicting the complexity of meshing Computer Aided Design (CAD) geometries with unstructured, hexahedral, finite elements. Meshing complexity ref...
: Scaling down in very deep submicron (VDSM) technologies increases the delay, power consumption of on-chip interconnects, while the reliability and yield decrease. In high perform...
Vladimir Pasca, Lorena Anghel, Claudia Rusu, Ricca...
Over the past decade, the trajectory to the petascale has been built on increased complexity and scale of the underlying parallel architectures. Meanwhile, software developers hav...