254 search results - page 46 / 51 » Deriving test plans from architectural descriptions |
DAC
1999
ACM
14 years 10 months ago
1999
ACM
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
DAC
2004
ACM
14 years 10 months ago
2004
ACM
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
DAC
2005
ACM
14 years 10 months ago
2005
ACM
We present an efficient search strategy for satisfiability checking on circuits represented at the register-transfer-level (RTL). We use the RTL circuit structure by extending con...
VLSID
2006
IEEE
14 years 10 months ago
2006
IEEE
: This paper presents a wideband frequency-shift keying (FSK) demodulator suitable for a digital data transmission chain of wireless neural stimulation microsystems such as cochlea...
NETGAMES
2005
ACM
14 years 3 months ago
2005
ACM
In this position paper we propose an evaluation framework for networked mobile gaming, consisting of user, group, communication, and environment models. Each of these components a...