497 search results - page 4 / 100 » Design Challenges for High Performance Nano-Technology |
VLSID
2006
IEEE
14 years 10 months ago
2006
IEEE
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
MICRO
2003
IEEE
14 years 3 months ago
2003
IEEE
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...
RTSS
2007
IEEE
14 years 4 months ago
2007
IEEE
The increased complexity of performance-sensitive software systems leads to increased use of automated adaptation policies in lieu of manual performance tuning. Composition of ada...
IFIP
2010
Springer
14 years 1 months ago
2010
Springer
Abstract Flow Accounting is a passive monitoring mechanism implemented in routers that gives insight into tra c behavior and network characteristics. However, processing of Flow Ac...
DAC
1998
ACM
14 years 10 months ago
1998
ACM
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is ...