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DATE
2006
IEEE
171views Hardware» more  DATE 2006»
14 years 1 months ago
4G applications, architectures, design methodology and tools for MPSoC
transistors the design of the SoC needs to be moved to a higher level of abstraction. We need to think in processors and interconnects rather than gates and wires. We discuss the n...
DAC
1997
ACM
13 years 12 months ago
Tools and Methodologies for Low Power Design
-- Designing for low power has become increasingly important in a wide variety of applications, including wireless telephony, mobile computing, high performance computing, and high...
Jerry Frenkil
ANCS
2009
ACM
13 years 5 months ago
Motivating future interconnects: a differential measurement analysis of PCI latency
Local interconnect architectures are at a cusp in which advances in throughput have come at the expense of power and latency. Moreover, physical limits imposed on dissipation and ...
David J. Miller, Philip M. Watts, Andrew W. Moore
ICCAD
2002
IEEE
106views Hardware» more  ICCAD 2002»
14 years 4 months ago
Throughput-driven IC communication fabric synthesis
As the scale of system integration continues to grow, the on-chip communication becomes the ultimate bottleneck of system performance and the primary determinant of system archite...
Tao Lin, Lawrence T. Pileggi
VLSID
2002
IEEE
60views VLSI» more  VLSID 2002»
14 years 8 months ago
Transistor Flaring in Deep Submicron-Design Considerations
Abstract - The deep sub-micron regime has broughtup several manufacturing issues which impact circuit-performance and design. One such issue is flaring of transistors which causes ...
Vipul Singhal, C. B. Keshav, K. G. Surnanth, P. R....