Buffer insertion has become a critical step in deep submicron design, and several buffer insertion/sizing algorithms have been proposed in the literature. However, most of these m...
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
This paper presents a middleware infrastructure for integration of heterogeneous embedded devices in ubiquitous computing environments. The proposed infrastructure employs the Dev...
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, ...
In this paper we present a continuous surface model to describe the interconnect geometric variation, which improves the currently used model for better accuracy while not increas...
Steiner tree is a fundamental problem in the automatic interconnect optimization for VLSI design. We present a probabilistic analysis method for constructing rectilinear Steiner t...