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ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
15 years 8 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
DAC
2004
ACM
16 years 5 months ago
Security as a new dimension in embedded system design
The growing number of instances of breaches in information security in the last few years has created a compelling case for efforts towards secure electronic systems. Embedded sys...
Srivaths Ravi, Paul C. Kocher, Ruby B. Lee, Gary M...
PARELEC
2006
IEEE
15 years 10 months ago
Application-Driven Development of Concurrent Packet Processing Platforms
We have developed an application-driven methodology for implementing parallel and heterogeneous programmable platforms. We deploy our flow for network access platforms where we h...
Christian Sauer, Matthias Gries, Jörg-Christi...
ICCAD
2003
IEEE
148views Hardware» more  ICCAD 2003»
16 years 1 months ago
Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization
In this paper we present a family of multi-objective hypergraph partitioning algorithms based on the multilevel paradigm, which are capable of producing solutions in which both th...
Navaratnasothie Selvakkumaran, George Karypis
DAC
2007
ACM
16 years 5 months ago
Gate Sizing For Cell Library-Based Designs
With increasing time-to-market pressure and shortening semiconductor product cycles, more and more chips are being designed with library-based methodologies. In spite of this shif...
Shiyan Hu, Mahesh Ketkar, Jiang Hu