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» Design Patterns for Reconfigurable Computing
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EWSN
2010
Springer
15 years 5 months ago
Virtualising Testbeds to Support Large-Scale Reconfigurable Experimental Facilities
Experimentally driven research for wireless sensor networks is invaluable to provide benchmarking and comparison of new ideas. An increasingly common tool in support of this is a t...
Tobias Baumgartner, Ioannis Chatzigiannakis, Maick...
SIGCOMM
2010
ACM
15 years 2 months ago
R3: resilient routing reconfiguration
Network resiliency is crucial to IP network operations. Existing techniques to recover from one or a series of failures do not offer performance predictability and may cause serio...
Ye Wang, Hao Wang, Ajay Mahimkar, Richard Alimi, Y...
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
15 years 8 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
133
Voted
ASAP
2009
IEEE
98views Hardware» more  ASAP 2009»
15 years 2 days ago
A Power-Scalable Switch-Based Multi-processor FFT
This paper examines the architecture, algorithm and implementation of a switch-based multi-processor realization of the fast Fourier transform (FFT). The architecture employs M pr...
Bassam Jamil Mohd, Earl E. Swartzlander Jr.
103
Voted
VLSID
2003
IEEE
96views VLSI» more  VLSID 2003»
16 years 2 months ago
Design Of A Universal BIST (UBIST) Structure
This paper introduces a Built-In Self Test (BIST) structure referred to as Universal BIST (UBIST). The Test Pattern Generator (TPG) of the proposed UBIST is designed to generate an...
Sukanta Das, Niloy Ganguly, Biplab K. Sikdar, Pari...