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» Design Principles for Combiners with Memory
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ISCA
2005
IEEE
154views Hardware» more  ISCA 2005»
14 years 2 months ago
Temporal Streaming of Shared Memory
Coherent read misses in shared-memory multiprocessors account for a substantial fraction of execution time in many important scientific and commercial workloads. We propose Tempor...
Thomas F. Wenisch, Stephen Somogyi, Nikolaos Harda...
ASPLOS
1998
ACM
14 years 27 days ago
Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors
Database applications such as online transaction processing (OLTP) and decision support systems (DSS) constitute the largest and fastest-growing segment of the market for multipro...
Parthasarathy Ranganathan, Kourosh Gharachorloo, S...
ICASSP
2011
IEEE
13 years 11 days ago
On cooperative image denoising
In this paper we suggest how several competing image denoising algorithms, differing in design parameters, or even in design principles, can be combined together to yield a better...
Maciej Niedzwiecki, Szymon Gackowski
ICML
1998
IEEE
14 years 9 months ago
Q2: Memory-Based Active Learning for Optimizing Noisy Continuous Functions
This paper introduces a new algorithm, Q2, foroptimizingthe expected output ofamultiinput noisy continuous function. Q2 is designed to need only a few experiments, it avoids stron...
Andrew W. Moore, Jeff G. Schneider, Justin A. Boya...
ISCAS
2006
IEEE
128views Hardware» more  ISCAS 2006»
14 years 2 months ago
Modeling and verification of high-speed wired links with Verilog-AMS
—Behavioral modeling with virtual built-in self-test verification of high-speed wired link designs is described in this paper. Our procedure is based on principles of top-down mi...
Ming-Ta Hsieh, Gerald E. Sobelman